NSF-funded testbed to study system re-configurability across the entire computing stack, from the processor to memory, storage, and the network. This system is aimed at enabling low-level experimentation and reconfiguration at the level of networks-on-chip (NoC), universal memory, and the network interconnect with multidimensional network topologies. Examples of target applications include dynamic multipath routing for load-balancing, universal memory that deploys byte addressable Non-Volatile Dual In-line Memory Module (NVDIMM) for persistent storage and Network-on-Chip (NoC) abstractions for Operating Systems.
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